1. Field
The inventive concept relates to a complementary metal-oxide-semiconductor (CMOS) transistor, a semiconductor device including the transistor, and a semiconductor module including the device.
2. Description of Related Art
In general, a semiconductor device may include a gate structure formed on a semiconductor substrate. The gate structure controls the flow of charge between source and drain regions of a CMOS transistor. The gate structure may include a gate insulating pattern, a polysilicon (poly-Si) gate and a gate electrode that are sequentially stacked. The poly-Si gate may contain impurity ions. The poly-Si gate may determine the work function of the CMOS transistor along with the semiconductor substrate.
When driving the semiconductor device, the poly-Si gate may have a parasitic capacitance due to diffusion of the impurity ions. The parasitic capacitance of the poly-Si gate may degrade the current drivability of the CMOS transistor. In order to prevent generation of the parasitic capacitance of the CMOS transistor, the poly-Si gate has been replaced by a diffusion stopping pattern and a metal gate that are sequentially stacked. The metal gate may not develop a parasitic capacitance during the driving of the semiconductor device.
However, the metal gate may react with the gate electrode and diffuse constituent atoms of the gate electrode into the diffusion stopping pattern and/or the gate insulating pattern. In this case, the gate electrode, depending on semiconductor fabrication process conditions, may cause deviation of a threshold voltage of the CMOS transistor from its intended magnitude.
The CMOS transistor, which includes the metal gate and the gate electrode, may be disposed in a semiconductor module and a processor-based system. The electrical properties of the semiconductor module and the process-based system may be degraded by reaction of the metal gate with the gate electrode in the CMOS transistor.